intoPIX previews JPEG XS technology for remote production and studio-over-IP applications at VidTrans 2019

26.02.19 10:14 AM By Raiffa

Additional multi-vendor interop demo for JPEG 2000 ULL VSF TR-01:2018 to be shown

VidTrans, Los Angeles, CA – February 26th 2019, intoPIX, leading provider of innovative image and video processing technologies, announced today that they are presenting their first IP-core implementation of “TICO-XS” 

at VidTrans2019 Technical Conference & Exhibition, February 26-28, 2019 in Los Angeles, CA. TICO-XS is the next generation of TICO SMPTE RDD35 standardized as JPEG XS by the ISO JPEG committee.

Playing a major role in lightweight low latency image coding standard development, intoPIX will show how JPEG XS impacts the transition to professional media over managed IP networks.

The innovative technology enables live production workflows to move from traditional SDI to networked IP and target COTS equipment. Compared to uncompressed video, JPEG XS will generate cost savings, allow greater network scalability, simplify connectivity and facilitate the capability to increase quality with no impact on latency. 

Applied within the new part 22 (for compressed video streams) of the SMPTE ST2110 standard suite, the technology will bring further bandwidth efficiency for elementary flows in HD, 4K and 8K. Thanks to microsecond latency and bandwidth ranging from 125Mbps to 400Mbps for HD and 500Mbps to 1.6Gps for 4K, it is suitable for any production workflow.

Next to that, VidTrans is hosting a VSF TR-01 JPEG 2000 Ultra Low Latency (ULL) interoperability demo by four leading live production solution providers, Artel, Evertz, Grass Valley and Media Links, to display the codec’s 

end-to-end latency below one frame. intoPIX, a major contributor to the 2018 ULL update of VSF TR-01, will additionally demonstrate its JPEG 2000 ULL IP-cores.

About intoPIX

intoPIX is an innovative technology provider of compression and image processing solutions for Broadcast equipment manufacturers. Their unique FPGA/ASIC IP-cores and fast SDKs enable users to manage more pixels, simplify connectivity, save cost and power and improve quality with no latency. 

Raiffa Lanove, +3210238470